Server RAM prices have been climbing since the DDR5 supply crunch hit, and operators are paying the difference on every rack. Astera Labs' Leo 2 and Leo X controllers change the math in one specific way: they let you bolt retired DDR4 modules onto a CXL expander card and feed them into a modern DDR5 system at a fraction of new DIMM cost. The Leo X goes further, attaching those pools directly to the fabric network of an AI rack rather than a single CPU.

The Leo 2 E-series and P-series controllers move from PCIe Gen5/CXL 2.x to PCIe Gen6/CXL 3.2. That protocol bump doubles bandwidth per lane, meaning each expander card delivers roughly twice the memory bandwidth to the host. To feed that doubled link speed, Astera doubled the DIMM channels per card from two to four. The result: up to 768GB of DDR4 or 4TB of DDR5 behind a single expander. The DDR4 variant uses a 4-channel, 3DPC board layout, packing 12 DIMMs into one card. That is a configuration you will rarely see outside this product line.

First-generation Leo expanders ran on PCIe Gen5 and CXL 2.x with two DIMM channels per card. The Leo 2 doubles the link bandwidth and doubles the channel count, so a single card now carries twice the bandwidth and twice the capacity of its predecessor. For a data center operator, that means retired DDR4 DIMMs, which cost a fraction of their original price, can be redeployed at a bandwidth previously impossible on a CXL link. CXL 3.2 also adds multi-level switching and peer-to-peer memory access, features that matter when pooling memory across multiple nodes rather than bolting it to one socket.

The source cuts off mid-sentence while describing the RAS features of the Leo 2 controllers, so the full scope of the hardware test engine is not stated. No pricing is given for any of the three product lines. The Leo X fabric-attached controller gets a single paragraph with no spec sheet, no bandwidth figure, and no confirmed customer deployment. Astera Labs says 2026 will be its year, but the article does not name a single OEM or hyperscaler committed to shipping Leo 2 or Leo X in a production system.

Watch for PCIe Gen6 host CPUs to ship in volume, because the Leo 2's doubled bandwidth is only realizable on a Gen6 root complex. The Leo X fabric-attached memory concept is the more interesting long-term bet, but it depends on whether AI rack vendors adopt CXL as a first-class fabric attachment rather than a sidecar. Marvell's Structera line already occupies the CXL DDR4 niche, so Astera needs to differentiate on capacity and RAS to win the reuse market.

The 4-channel 3DPC DDR4 layout is the key differentiator; it lets operators reuse retired DIMMs at a bandwidth that Gen5 CXL could not sustain. Leo X's fabric attachment bypasses the CPU root complex entirely, which changes the memory topology for AI racks.