Until recently, AI in EDA was treated as a single-task novelty: a model that generates a netlist, or a classifier that flags a defect. This week's batch of seven papers from Peking University, Purdue, NYU, Michigan, Sydney, Edinburgh, and Heidelberg tells a different story. The work is no longer about whether AI can do one EDA job. It is about whether AI can coordinate multiple jobs across a design flow, and whether thermal physics can be folded into that coordination.

Peking University's paper on BEOL interconnect stacks uses layer-resolved thermal measurements to build a predictive structure-to-conductivity model for advanced nodes. The specific contribution is a framework that maps physical layer geometry to thermal conductivity without requiring full-stack simulation at every design iteration. Purdue's DRC-Aid paper takes a different route: an agentic framework that calls inference-time LLMs to correct design-rule violations, meaning the LLM is not pre-trained on a fixed rule set but reasons over the violation context at inference time. NYU's routing work uses history-aware offline reinforcement learning with an LSTM backbone, targeting dense layouts where traditional DRC-driven routing hits congestion walls.

The Edinburgh paper makes the before/after explicit. Its framing is a shift from LLMs as generators — producing code, netlists, or test patterns — to LLMs as orchestrators that dispatch tasks across existing EDA tools. The practical implication: the LLM does not replace the EDA toolchain; it sequences and routes work through it. IC-ThermBench, from UTS, ShanghaiTech, and TU Munich, addresses the thermal side of this shift. It provides an open, progressive benchmark for 2.5D and 3D IC thermal learning, which means researchers can now evaluate thermal models against a common dataset rather than proprietary, non-reproducible setups. The benchmark is progressive, implying difficulty scales as the model improves.

None of the seven papers report production deployment. The source does not state whether any of these methods have been validated on a shipping silicon node, nor does it give benchmark scores, comparison baselines, or runtime figures. The Peking thermal model's accuracy relative to full physics simulation is not quantified in the roundup. The Purdue agentic DRC repair's success rate on real design-rule violations is not stated. The NYU routing results are described only as targeting dense layouts; no wire-length or congestion metrics are given. The Edinburgh orchestration paper is explicitly a perspective piece, not a benchmarked system.

The convergence of agentic EDA and thermal-aware 3D design is the next convergence point to track. If Purdue's inference-time LLM approach for DRC repair scales to multi-tool orchestration, and if Peking's layer-resolved thermal model feeds into that orchestration loop, the design flow becomes a closed system where thermal constraints propagate back into routing and placement decisions in real time. Watch for a paper that combines these two threads.

The Edinburgh paper's generation-to-orchestration framing is the most architecturally significant claim in the batch, as it redefines the LLM's role from content producer to workflow controller. The Peking BEOL thermal model and IC-ThermBench benchmark together suggest thermal-aware 3D design is moving from ad-hoc simulation to a learnable, generalizable problem.