Sanctions push CXMT's 4F² DDR5 onto DUV
Rosenblatt calls CXMT's 4F² DDR5 plan a paper tiger, and BofA points to EUV sanctions as the reason.
| CXMT 4F² DDR5 | |
|---|---|
| cell architecture | 4F² |
| process | 15-nanometer |
| lithography | older DUV |
| area reduction | as much as 50% |
| ship date | before year-end |
The 4F² cell stacks bit lines, capacitors, and transistors vertically to cut DRAM area by up to 50% over a 6F² layout.
CXMT cannot buy EUV machines, so it must rely on DUV at 15 nm to make the cell work.
The big three have studied 4F² for more than a decade and still avoid mass production because of cost, yield, and qualification.
What is unmeasured is yield, price, and whether CXMT can qualify large volumes in 2027 or 2028 while Samsung, SK hynix, and Micron stay on 6F².
The 50% figure is a geometry claim, not a shipping proof.
Yield and price are unmeasured, so the DDR5 date stays unverified.
After @MajorOcelot45. We did not report this. The pictures, if any, are theirs.
