Samsung ships 12-layer HBM4E samples on May 29, 2026
On May 29, 2026, Samsung said it began shipping 12-layer HBM4E samples at a stable 14 Gbps pin speed, with bandwidth up to 3.6 TB/s per stack.
| HBM4E | |
|---|---|
| Layers | 12-layer |
| Pin speed | 14 Gbps stable; 16 Gbps scalable; >20% over HBM4 |
| Bandwidth | 3.6 TB/s per stack |
| Capacity | 48 GB; >30% over previous generation |
| Planned configurations | 32 GB 8-layer; 64 GB 16-layer |
| Process | 6th-generation 10-nanometer-class DRAM (1c); 4nm logic base die |
| Efficiency/thermal | 16% energy efficiency; >14% thermal resistance |
| Mass production | aligned with customer schedules |
The samples use a 48 GB stack and can scale to 16 Gbps.
Samsung built the parts on a 1c DRAM process and a 4nm logic base die. The company says energy efficiency improves by 16% and thermal resistance by more than 14% versus HBM4.
Samsung says mass production will follow customer schedules after sample shipments. The release does not give a date, name customers, or list pricing.
The release also leaves out a datasheet and independent validation of the 16 Gbps and 3.6 TB/s figures.
The open question is whether 12-layer bonding holds yield at 14 Gbps before the 16 Gbps target is chased.
Sample shipment puts Samsung into customer validation, not production readiness.
Lead with the May 29, 2026 sample shipment and stable 14 Gbps speed, and keep 16 Gbps, 3.6 TB/s, and mass production as unconfirmed claims.
After semiconductor.samsung.com. We did not report this. The pictures, if any, are theirs.
