The per-core gap, not core count, is the multi-thread constraint
The per-core gap decides the multi-thread ceiling, not core count. A 12-core Zen 6 CCD could match the 9950X3D2's 11K Cinebench render score, but no sample has been measured.
| 12-core Zen 6 | Ryzen 9 9950X3D2 | Olympic Ridge | |
|---|---|---|---|
| cores | 12 | 16 | 24 |
| architecture | Zen 6 | Zen 5 | Zen 6 |
| process | TSMC N2P | ||
| Cinebench render | around 11K points | ||
| CCD | single Zen 6 CCD | two Zen 6 CCDs |
1usmus estimates a 12-core Zen 6 CCD could land near the 9950X3D2's 11K Cinebench render score. The Wccftech page carries only that estimate.
Each Zen 6 CCD packs 12 cores. Olympic Ridge can use two for up to 24.
If 12 cores land near 11K, the constraint shifts to CCD supply, package density, and thermal headroom. A fab or OEM decides whether one CCD can carry the flagship price point.
No clock, price, TDP, or Cinebench score for the 12-core part is given.
A per-core estimate, not a measured product result. The real constraint is CCD supply and package density.
After @1usmus. We did not report this. The pictures, if any, are theirs.
