216 gigabytes. That is the on-package memory figure Alibaba attached to its Zhenwu V900 accelerator at the Apsara Conference in Hangzhou on September 22. The number sits 53 percent above the 141GB on NVIDIA's H200, and it lands in a market where memory capacity has become the primary differentiator between competing AI silicon. Alibaba has set a Q1 2027 launch window for the part, which puts it roughly a year behind NVIDIA's current-generation H200 shipping timeline.

The interconnect architecture is where the V900's scaling story gets concrete. Alibaba's ICN Switch fabric delivers 1.2 TB/s of chip-to-chip bandwidth, and the design allows roughly 1,000 V900 units to operate as a single logical accelerator. Pushing further, Alibaba claims a 500,000-chip cluster that would aggregate 108 petabytes of on-package memory. The rack-scale solution bundles Yitian CPUs, Pangu NICs, and Zhenyue storage controllers alongside the accelerators, positioning Alibaba as a full-stack vendor rather than a chip supplier.

The 1.2 TB/s per-link figure is what lets the 1,000-chip domain behave as one device without the latency penalties that degrade large-scale inference. The performance delta against the prior generation is stark. The Zhenwu M890 delivered approximately 0.6 PFLOPS at FP16; the V900 targets 1.8 PFLOPS, a threefold increase with native FP8 and FP4 support. On the infrastructure side, the gap is equally large. Morgan Stanley estimated Alibaba's data-center capacity at roughly 5 GW by end-2026.

The 20 GW target for 2032 implies 2 to 3 GW of net annual additions over six years. That is a sustained capex program rivaling any single hyperscaler's buildout pace. The 4-to-10-trillion-parameter range for Qwen 4.5 and 5.0 is the workload that justifies the spend. What the source does not confirm is the memory supplier. Wccftech theorizes CXMT's HBM3E, citing overlapping volume production timelines, but Alibaba has not publicly named the vendor. No process node, no die size, no pricing, and no confirmed yield figures were disclosed.

The 500,000-chip cluster claim also lacks a deployment timeline or a named customer. Whether CXMT can actually supply the volume of HBM3E required for a 108-petabyte cluster remains an open question, particularly given recent reports of yield issues in its HBM3 production. Watch the Q1 2027 launch window for a confirmed memory vendor and a process node. The 4-to-10-trillion-parameter range for Qwen 4.5 and 5.0 will determine whether the 20 GW buildout is commercially justified or aspirational.

The RSI pipeline Alibaba described, where the model identifies its own weaknesses and constructs training data, is the variable that could compress the training cycle and make the capex case harder to dismiss.